This invention relates to the fabrication of semiconductor devices. More particularly, this invention relates to selective deposition of silicon oxide onto silicon substrates.
Optimization of semiconductor fabrication sometimes requires a thicker nonconducting film on some components than on other components. For example, a thick oxide layer or spacer on a P-type silicon wordline may be desired because the boron implants diffuse readily to an adjacent layer. In contrast, an N-type polysilicon component may optimally require a thinner oxide layer or spacer since N-type dopants do not diffuse as readily. A simple process that provides different thickness nonconducting films and spacers is desired in semiconductor fabrication.
Forming oxide layers and spacers of different thicknesses over varying silicon substrates using current methods requires the application of a first mask over select parts of the semiconductor device and then depositing a layer of silicon oxide over the unmasked parts of the semiconductor device. The first mask is then removed and a second mask is applied over the parts that have been coated with the first silicon oxide layer leaving other parts unmasked. Subsequently, a second silicon oxide layer is deposited on the unmasked parts. Finally, an etch is used to remove silicon oxide from select surfaces, leaving behind an oxide layer or spacers where desired. This process adds a number of steps to the manufacturing procedures thereby increasing the complexity of the fabrication. As such, semiconductors are typically manufactured oxide with oxide layers or spacers of an intermediate thickness that will work acceptably, although not optimally, for either P-type or N-type polysilicons substrate.
A hallmark of the current invention is the provision of a process that selectively deposits silicon oxide based on the conductivity type of the underlying silicon substrate.
The current invention is a method for selectively depositing silicon oxide onto a silicon-comprising surface wherein the selectivity is based on the conductivity type of the silicon. In one embodiment, the invention is a semiconductor processing method for selectively depositing silicon oxide onto silicon, the method comprising the steps of: (i) providing a silicon-comprising substrate having exposed regions of different type conductivity; (ii) contacting the substrate with ozone and tetraethylorthosilicate (TEOS) gases; and, (iii) reacting the ozone and TEOS in contact with the substrate to selectively deposit silicon oxide onto the substrate, such that, compared to the deposition rate on exposed regions of non-doped silicon, the silicon oxide deposits at a faster rate on exposed regions of P-type silicon and at a slower rate on exposed regions of N-type silicon.
Another embodiment of the invention is a method for forming an oxide layer of varying thickness on a silicon-comprising substrate, the method comprising the steps of: (i) providing the silicon-comprising substrate having a surface and comprising at least a first and second region of different type conductivity; and (ii) depositing silicon oxide onto the substrate in a single process step, to form an oxide layer over the first and second conductivity regions; whereby oxide layer overlying the first conductivity region has a first thickness and the oxide layer overlying the second conductivity region has a second thickness that is greater than the first thickness.
Another embodiment of the invention is a semiconductor processing method of forming spacers of variable thickness, the method comprising providing a silicon-comprising substrate having a surface comprising at least one first P-type silicon structure or protrusion and at least one second structure or protrusion, provided that: (1) when the first protrusion comprises P-type or non-doped silicon, then the second structure or protrusion comprises either non-doped silicon or N-type silicon; and (2) when the first protrusion comprises non-doped silicon, then the second structure or protrusion comprises N-type silicon. Next, TEOS is decomposed with ozone to selectively deposit silicon oxide over the silicon surface and both the first protrusion and the second protrusion, such that a greater thickness of silicon oxide is deposited on the first protrusion than on the second protrusion. Finally, the deposited silicon oxide is etched to remove the oxide from select areas and leave silicon oxide as a layer or as formed spacers of variable thickness around the first protrusion and the second protrusion.
Another embodiment of the invention is a semiconductor processing method of forming wordlines with an oxide layer or formed spacers of variable thickness. The method of this embodiment comprises providing a silicon-comprising substrate having a surface comprising at least one first wordline comprising P-type silicon and at least one second wordline comprising N-type silicon. Next, TEOS is decomposed with ozone to selectively deposit silicon oxide over the substrate surface and over both the first wordline and the second wordline, such that a greater thickness of silicon oxide is deposited on the first wordline than on the second wordline. Then, the silicon oxide deposited on the substrate during the reaction step is etched to provide a silicon oxide layer or formed spacers of variable thickness around the first wordline and the second wordline.
Another embodiment of the invention is a semiconductor processing method of forming gates with spacers of variable thickness. The method of this embodiment comprises providing a silicon-comprising substrate having a surface comprising at least one first gate comprising P-type silicon-comprising material and at least one second gate comprising N-type silicon-comprising material. Next, TEOS is decomposed with ozone to selectively deposit silicon oxide over the substrate surface and over both the first gate and the second gate, such that a greater thickness of silicon oxide is deposited on the first gate than on the second gate. Then, the silicon oxide deposited on the substrate during the reaction step is etched to leave a silicon oxide layer or formed spacers of variable thickness around the first gate and the second gate.
Another embodiment of the invention is a memory device comprising at least a first wordline comprising P-type silicon-comprising material and at least a second wordline comprising N-type silicon-comprising material, wherein both the first wordline and the second wordline have nonconductive spacers comprising silicon oxide wherein the nonconductive layer or formed spacer for the first wordline is thicker than the nonconductive layer or spacer for the second wordline.
Another embodiment of the invention is a multi-gate semiconductor device comprising at least one gate comprising (i) P-type silicon-comprising material, (ii) at east one second gate comprising N-type silicon-comprising material and, (iii) layer or a nonconductive layer or formed spacers around each of the first and second gates, wherein the nonconductive layer or spacer is thicker for the first gate than for the second gate.